Specify the layer and production stage for each copper weight first
Heavy-copper PCB RFQs should distinguish base copper from target finished copper by layer and confirm outer-layer plating conditions. “3OZ board” or “4OZ board” alone does not describe every layer's structure and cannot guarantee system current capacity or temperature rise. Also identify traces, vias, terminals, and mounting thermal boundaries along current paths.
| Documentation | Confirmed Issues |
|---|---|
| Layer-by-Layer Copper Thickness Table | Definitions for inner and outer layers, and acceptance of finished requirements |
| Current Path | Whether narrow traces, corners, vias, or terminals create local bottlenecks |
| Structure and Insulation | Whether copper distribution, dielectric, isolation slots, and mounting requirements agree |
| Soldering and Assembly | Whether large terminals, thermal pads, and subsequent assembly require joint review |
| Inspection and Verification | Who measures copper thickness at specified locations, performs net electrical testing, and tests load/temperature rise |
Compare thick copper lines and buried copper blocks separately
Heavy-copper traces emphasize layer-specific copper weights and current-carrying geometry. Local embedded copper blocks additionally require defined positions, connections, resin interfaces, and insulation. Compare 3OZ six-layer reference board, 4OZ four-layer reference board and Localized embedded copper block reference board, but these structures are not interchangeable and are not confirmed stock products.
Ask manufacturers and system-verification teams separate questions
Manufacturers should address structural feasibility, materials, engineering adjustments, and agreed inspections. System-verification teams should define actual loads, continuous or pulsed operation, environment, and mounting/cooling. Do not infer an entire power product's rating from a bare board's copper weight. Retain identical technical conditions for projects supplied in Shenzhen, Dongguan, or Guangzhou, then confirm delivery arrangements separately.
Select a route from the heavy-copper PCB catalog and attach copper-weight tables, current paths and acceptance requirements to the quotation inquiry. If complete drawings are unavailable, describe the project question first, then supply engineering documentation.
Data Basis:Engineering reference | Digital PCB stackups: material databases and controlled manufacturing structures, checked on 2026-10-05. Used for the corresponding file, structure, or material descriptions in this article. The procurement checklist is a communication method, not a statement of universal fabrication capability or delivery commitments.
Related procurement and acceptance Q&A
Can 3OZ or 4OZ represent finished copper on every layer?
No. Distinguish base copper from target finished copper by layer, confirm outer-layer plating definitions, and list acceptance locations and requirements alongside them.
See: Specify the layer and production stage for each copper weight first
Does a heavy-copper board guarantee high system current?
Narrow traces, corners, vias, terminals, and cooling/mounting also limit current capacity. System teams must provide continuous/pulsed loads and environmental conditions; bare-board copper weight cannot establish system power.
See: Ask manufacturers and system-verification teams separate questions
Can heavy-copper traces and local embedded copper blocks be compared under one quotation?
They are different structures. Embedded copper blocks also require positions, connections, resin interfaces, and insulation. Align the task first, then itemize each structure's manufacturing and verification scope.
See: Compare heavy-copper traces and embedded copper blocks separately
Should large-terminal soldering be reviewed alongside heavy-copper PCB fabrication?
Copper distribution and thermal mass affect subsequent soldering. Manufacturing and assembly should jointly confirm large terminals, thermal pads, and mounting, avoiding discovery of changed assembly conditions only after bare boards pass.
See: Specify the layer and production stage for each copper weight first
Which testing responsibilities should heavy-copper quotations distinguish?
Agree separately on copper-thickness measurement locations, net electrical testing, and temperature rise under actual loads. Manufacturers address structures and inspections; system-verification teams provide loads, environment, and cooling conditions.
See: Ask manufacturers and system-verification teams separate questions
Itemize base copper, outer-layer plating buildup, and finished requirements separately
Base copper is the starting copper-foil specification. Outer layers may gain electroplated copper during manufacturing; finished copper is the final requirement at agreed locations after processing. List initial specifications, final requirements, and acceptance definitions by layer. “Outer base copper 2OZ” and “finished outer copper 2OZ” are different quotation conditions. Hole-wall copper is a separate object and is not automatically defined by surface-copper labels.
| Layer or Object | Quotation Field | Manufacturing Response |
|---|---|---|
| Inner Layer | base copper specifications and finished copper requirements | Actual adopted structure and tolerance basis |
| Outer Layer | base copper, buildup, and final requirements | Process combination, inspection location, and record |
| Hole Wall | Hole category, finished hole, and copper layer requirements | test or cross-section objects and criteria |
| Local Structure | Copper blocks, exposed-copper openings, or large terminal areas | Connection, Insulation, Flatness, and Assembly Conditions |
Copper weight OZ generally means copper mass per square foot, not thickness directly in millimeters. Using 1 ounce ≈28.35 g, 1 square foot ≈929.03 cm², and copper density ≈8.96 g/cm³ gives 1 oz/ft² ≈34 µm and 3OZ ≈102 µm. This only illustrates unit conversion; purchased finished thicknesses and tolerances still follow approved drawings and actual processes.
Map the actual current path before identifying its narrowest sections
From input terminals through copper traces, layer-transition vias, switches, and shunts to the output, identify each section's geometry and current. Current does not necessarily divide equally among parallel vias; via locations, connecting copper, and path resistance affect sharing. A theoretical single-via value multiplied by via count is not a board-level guarantee.
If a section measures 2 mΩ at an effective current of 20 A, its dissipation is I²R＝0.8 W. Adding 1 mΩ at a joint adds another 0.4 W. This example illustrates terminal and connection voltage-drop importance; it is not a 20 A recommendation. Measure voltage drop and temperature rise separately across copper paths, vias, and terminals to locate bottlenecks.
Heavy copper affects both geometry and subsequent soldering
Heavy-copper structures require review of etched geometry, spacing, copper distribution, dielectric fill, and layer combinations. Increasing copper weight does not imply that existing minimum spacing and board thickness remain possible; manufacturers must confirm the actual combination. Recheck impedance, mechanics, and insulation if dielectric or via structures consequently change.
Large copper areas and terminals increase thermal mass, potentially requiring different soldering profiles. Maintain an interface between PCB purchasing and assembly review, defining large-terminal joints, thermal pads, depanelization, and fastening. Bare-board copper-weight reports cannot establish that assembly soldering or system temperature rise has passed.
Retain Evidence for Copper Weight and System Thermal Acceptance Separately
At receipt, check revisions, layer-specific requirements, report batch links, and sampling locations. Specify special cross-sections or other methods in the order; they are not promised by default for every batch. System teams should record current, section-by-section voltage drop, and temperature rise with actual enclosures, loads, environments, and mounting, distinguishing continuous from pulsed operation.
Reapprove and verify affected paths after changes to base copper, plating, vias, or terminals. Outputs should include layer-specific copper tables, current-path diagrams, manufacturing responses, and thermal-test conditions. Purchasing can then compare total costs for identical structures, without treating higher advertised OZ values as inherently better or inferring system power from bare-board copper weight.
Surface-copper and hole-wall copper requirements cannot compensate for each other
Meeting outer-layer copper requirements does not establish that the thinnest hole-wall locations or inner-layer connections meet agreements. Likewise, hole-wall copper records do not establish surface-copper geometry or terminal connections. Purchasing tables should list criteria, inspection locations, and record scope for each object; technical teams should confirm correspondence to actual current paths.
If a supplier proposes different base-copper and plating combinations to meet the same finished requirement, review effects on line widths/spacings, hole diameters, board thickness, and surface areas before authorized approval. Similar finished results do not imply identical intermediate processes or costs. Quotations and acceptance apply only to confirmed combinations, and reorders should retain that baseline.
Source material and applicable scope
- Würth Elektronik, “Digital PCB Standards — Stackups and Material Database”; version: online page, no fixed revision identified; checked 2026-10-18; relevant sections: Digital stackups, Material database. Supports planning boundaries for stackups and material models; purchasing comparisons, approval tables, and worked examples are this site's engineering methods.
- Texas Instruments, “PCB thermal calculator”; version: online page, no fixed revision identified; checked 2026-10-18; relevant sections: inputs for copper-area and temperature comparisons. Supports thermal-boundary and dissipation-input methods; provides no universal heavy-copper current limits.
