PCB · PCB ASSEMBLY · DESIGN · PROCUREMENT AND ACCEPTANCE
Opening Gerber graphics does not establish complete manufacturing semantics. This article organizes delivery checks by layer function, drilling, units, polarity, and coordinates. 6-layer mapping and unit-ratio examples explain ambiguities, followed by independent-viewer review, netlist cross-checking, and revision freezing.
Read ArticleEven with the same S1000-2M grade designation, check the manufacturing site, material construction, and corresponding documents. This article distinguishes datasheets, processing guides, SDSs, and test reports, and uses a manufacturing-site change record to explain lot traceability, consistent comparisons, and substitution approval so release is not based solely on matching names.
Read ArticleRO4835's improved oxidation resistance cannot directly establish service life for any product. This article builds aging validation from the operating environment and electrical baseline, using insertion-loss change calculations and a test matrix to control fixture, surface, and lot effects and distinguish recoverable changes from permanent performance drift.
Read ArticleIncoming RO4400 bondply thickness is not the post-lamination dielectric thickness of a multilayer PCB. Based on the manufacturer's processing guidance, this article explains how copper distribution and fill affect thickness, structures the review around an interlayer thickness budget, and provides checks for measurement locations, impedance effects, resin starvation, voids, and excessive thickness.
Read ArticleSpecifying RO4350B alone does not guarantee board insertion loss or impedance. This article retains the process and design Dk distinction and the 4 mil thin-laminate exception, organizes channel validation around copper foil, dielectric thickness, ports, and vias, and uses a length-difference calculation to distinguish material loss from complete-channel loss.
Read ArticleRO4003C process Dk and design Dk serve material inspection and circuit modeling, respectively. The manufacturer does not rate the material UL 94 V-0. This article uses an ideal propagation calculation to show the effect of using the wrong parameter, and provides a parameter comparison, a flame-requirement check, and a model-calibration workflow.
Read ArticleRO4000 is a material family, not a complete procurement specification for cores, bondply, and copper foil. This article organizes the material list by layer function, uses an eight-layer stackup thickness budget to explain nominal versus post-lamination values, and covers hybrid lamination, impedance groups, substitution approval, and cross-section verification.
Read ArticleRO3003 thermal expansion and dielectric temperature response jointly affect RF boards. This article distinguishes directional material CTE, structural stress, and electrical drift, using dimensional examples to explain direction/temperature ranges and providing combined temperature, dimension, RF, and via-interconnection verification records.
Read ArticleAlthough RT/duroid 5870 and 5880 are both glass-microfiber-reinforced PTFE, their Dk, Df, and mechanical properties differ. This article retains manufacturer datasheet frequencies, methods, and revisions, uses phase calculations to illustrate substitution effects, and organizes purchasing controls, hole processing, and sample verification.
Read ArticleRO3010's high Dk can miniaturize some RF circuits, but impedance widths, resonant dimensions, and tolerance sensitivity require recalculation together. This article distinguishes process/design Dk, illustrates applicability with dimensional scaling, and provides material-card, manufacturing-review, and RF-sample verification methods.
Read ArticleMinimum hole size, maximum copper weight, and maximum layer count in PCB capability tables cannot simply be combined. Aspect-ratio and nominal annular-ring examples explain parameter dependencies, with combined-specification tables, quotation alignment, and engineering-clarification checklists to turn individual capabilities into manufacturable orders.
Read ArticleI-Tera MT40 dimensional compensation must link to warp/fill directions, copper distribution, material structure, and lamination routes. Based on the manufacturer's December 2025 processing guide, this article provides measurement-point and compensation-factor calculations, linked lamination/drilling records, and methods for distinguishing scaling, rotation, and local deformation.
Read ArticleHDI structure and low-volume material preparation involve two separate decisions: define via layer pairs and build-up layers, then assess how material availability and substitutions affect validation.
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