A Single Impedance Value Is Insufficient to Define an Order
Controlled-impedance PCB prototyping requires the net, signal layer, reference plane, trace type, and sources of the target and acceptance tolerance. Reference-design values of 50Ω or 100Ω should not automatically apply to every interface. Manufacturing compensation,Material Change and measurement methods need records so models, Gerber files, and reports use consistent conditions.
| Confirmation item | Content to Fill | Corresponding Output |
|---|---|---|
| Network group | Interface, single-ended or differential, target, and basis | impedance requirement table with matching numbers |
| Actual Layer Pair | Signal Layer, Reference Layer, Dielectric, and Copper Weight | Approved Stack-up and Material Version |
| Manufacturing Geometry | Line width/spacing, solder-mask conditions, and allowable compensation | Data before and after compensation and approval records |
| Test coupon | Replicated layer pairs, location, connection area, and coupon ID | Coupon map and mainboard association |
| Measurement | Method, connections, recorded range, and acceptance conditions | Original results and corresponding board/coupon numbers |
Purpose and Scope of Coupons
Test coupons help confirm corresponding manufacturing geometry; complete interfaces may also include connectors, vias, layer transitions, and components. Passing coupons do not establish that every main-board link passes. Separate manufacturing inspections from prototype interface verification. When referencing Six-layer impedance verification prototype, first check actual layer pairs and the current question, then determine required records.
What to Recheck After Changing Material or Dielectric Thickness
- Whether affected nets and layer pairs have been recalculated.
- Whether compensation exceeds the original approval and whether vias/pads need joint review.
- Whether coupon drawings have been updated and test reports reference the new revision.
- Whether first-sample results support only the new structure and old reports should be marked historical.
from Impedance Board Catalog Compare USB, Ethernet, and DDR references, then use Stackup Confirmation Close Structure.Request Quote with net tables and coupon drawings attached, rather than simply requesting “an impedance board.”
Data Basis:Engineering reference | Digital PCB stackups: material databases and controlled manufacturing structures, checked on 2026-10-05. Used for the corresponding file, structure, or material descriptions in this article. The procurement checklist is a communication method, not a statement of universal fabrication capability or delivery commitments.
Related procurement and acceptance Q&A
Is specifying 50Ω or 100Ω impedance enough for an RFQ?
Also specify nets, single-ended/differential structure, signal layers and reference planes, target basis, and tolerances. Reference values cannot automatically apply to every interface.
See: One impedance value cannot define an order
Which fields should link impedance coupons to the main board?
Match coupon IDs, replicated layer pairs, locations, and manufacturing geometry to the main-board revision. Reports should retain methods, connections, and board/coupon IDs.
See: One impedance value cannot define an order
Why might link testing still be needed after an impedance coupon passes?
Complete interfaces also include connectors, vias, layer transitions, and components. Coupons verify manufacturing geometry and cannot replace prototype interface-function verification.
View: Test coupon function and boundary
Can I change line width after changing dielectric thickness without updating coupon drawings?
Recalculate affected layer pairs, review compensation together with vias/pads, and update coupon drawings and reports to the new revision. Mark old reports with historical conditions; do not mix them.
See: What to recheck after changing materials or dielectric thickness
What should testing charges specify when comparing impedance-board quotations?
Agree on coupon drawings, measurement methods, connections, recorded ranges, and criteria. Itemize manufacturing inspection and system-interface verification separately rather than using “impedance included” to summarize all responsibilities.
What does TDR measure, and why does it need a window?
TDR, or time-domain reflectometry, launches a step into the channel under test and uses returning reflections to observe impedance versus position. It reveals discontinuities at connections, traces, and endpoints; results depend on step rise time, fixtures, cables, and calibration. Purchasing should specify more than “perform TDR”: define single-ended or differential measurement, layer pairs, coupon IDs, and measurement conditions.
The ideal relationship is ρ＝(Z−Z0)/(Z＋Z0), rearranged as Z＝Z0×(1＋ρ)/(1−ρ). With a reference impedance of 50 Ω and reflection coefficient of 0.05, the ideal conversion is approximately 55.26 Ω. This is a principle-based example, not a target tolerance or actual report. Negative reflections generally indicate impedance below the reference, but complex channels can superimpose multiple reflections. Individual peaks cannot unconditionally be treated as true local resistance.
Reports should provide measurement conditions and raw waveforms together
| TDR Fields | Details to Specify | Problem Solved |
|---|---|---|
| Object | Main board, coupon ID, net group, layer pair, and trace type | prevent disconnection between reports and actual boards |
| Instruments and Calibration | Equipment, fixtures, reference planes, and calibration status | Measurement Boundary Definition |
| Excitation | Rise Time and Filter Settings | explain resolution and peak differences |
| Window | Entry transition, valid trace segment, and endpoint intervals | Explain which segment yielded the decision value |
| Result | Raw waveform, statistics, and judgment source | Supports recalculation and retesting |
Measurement windows should exclude or handle entry fixtures and end transitions as agreed, rather than arbitrarily selecting a short, flat section. Faster rise times generally resolve closer discontinuities but may also reveal details insignificant at operating edge rates. Peak values from different settings cannot be compared directly. Acceptance limits must come from the order and applicable specifications, not numbers in this article's examples or historical interface articles.
Two single-ended results cannot simply replace a differential target
Differential structures are coupled; odd-mode, even-mode, and single-ended excitation relationships differ. For differential impedance, define differential excitation and channel deskew methods. Measuring each trace at 50 Ω and adding them does not establish 100 Ω. Reports should also identify test conditions and termination connections so common-mode results are not labeled differential.
Coupons should replicate actual signal layers, reference planes, line widths/spacings, copper weights, and corresponding manufacturing conditions, with links to the main-board batch. Differences in location and structure limit representativeness. Even if coupons pass, connectors, vias, layer transitions, and components may still limit the actual interface, requiring separate channel and operational verification.
Align methods before changing manufacturing geometry after abnormal measurements
First check coupon identity, calibration, connections, and measurement windows, and repeat with identical settings. Then check whether actual stackups, line widths/spacings, and copper weights match the approved revision. Do not immediately widen every net because one curve reads high; reflections may originate at the entry or fixture. If parties obtain different results, exchange conditions and raw waveforms and reproduce the same segment first.
If manufacturing geometry is confirmed out of specification, record affected layer pairs, main-board scope, and disposition. Reapprove line-width or dielectric-thickness adjustments and synchronize coupon drawings. Mark old reports with historical conditions and reference the new revision on reorders. The final output should be identifiable, reproducible curves and configurations, not merely an “impedance passed” stamp.
TDR RFQ responses should support actual incoming acceptance
After purchasing issues targets, the manufacturer should identify the coupon, number of test objects, production-batch linkage, and record-delivery timing. Explicitly identify exclusions; the name “impedance board” does not imply that all curves are supplied. Confirm testing charges, fixtures, and coupon delivery separately to avoid discovering mismatched documentation objects upon receipt.
Before initial testing, review blank report fields for net groups, layer pairs, coupon IDs, rise times, windows, and criteria. Reports need not include irrelevant instrument details, but must support retesting under identical conditions. If dielectric or compensation changes later, reference the new coupon revision and approved scope; do not use old curves to accept current boards.
Source material and applicable scope
- Würth Elektronik, “Digital PCB Standards — Stackups and Material Database”; version: online page, no fixed revision identified; checked 2026-10-18; relevant sections: Digital stackups, Material database. Supports planning boundaries for stackups and material models; purchasing comparisons, approval tables, and worked examples are this site's engineering methods.
- Tektronix, “TDR Impedance Measurements: A Foundation for Signal Integrity”; version: online page, no fixed revision identified; checked 2026-10-18; relevant sections: Reflection Coefficient, TDR Resolution Factors, TDR Accuracy Factors, Differential TDR. Supports TDR principles and measurement conditions. Order fields and examples are engineering compilations; historical USB limits from the article are not adopted.
