PCB assembly parameters must map to actual processes and delivery states. SMT and through-hole assembly in quotations do not imply cleaning, programming, calibration, depanelization, and functional tests. “Inspection” does not identify checked components or interfaces. Freeze identical board documentation first, then place every process's inputs, inspections, pricing, and responsibilities in one route table.
Decompose processes starting from final delivery backwards
Define whether delivery is an undepanelized assembly, a board ready for power-up, or a wired/enclosed product, then derive required mechanical, electrical, and software tasks. Connectors, heatsinks, and shields can change inspection access; enclosures can alter thermal conditions. Tests only before enclosure installation cannot silently become complete-system results afterward.
PCBWay's public capability page separately lists SMT, through-hole, mixed assembly, and inspection methods, useful for identifying comparison fields. Its values, qualifications, and historical standard references are company-specific public information, not this site's commitments. Reconfirm current processing and acceptance bases in the order; public capability lists cannot replace route review.
| Process | Input Condition | Inspections or Outputs to Agree Upon | Cost Basis |
|---|---|---|---|
| Printing and Placement | Stencil, pick-and-place data, BOM, material supply, and DNP | First article, offset, and post-solder appearance scope | Preparation Separated from Per-Board Processing |
| Insertion and Soldering | Leads, component heat tolerance, access, and fastening | Insertion direction, solder joints, and thermal impact | Confirm insertion, soldering, and fixture separately |
| Cleaning or Coating | Material compatibility, masking, and product requirements | Cleaning, drying, coverage, and areas that must remain uncoated | Process Preparation and Batch Execution |
| Programming and Calibration | Programs, identity data, parameters, and fixtures | Version verification, uniqueness, and result recording | Development Preparation and Per-Board Labor Hours |
| Panelization and Final Testing | Deliverable outline, load, peripherals, and programs | Final Configuration Function and Re-Inspection | Execution count, test duration, and packaging |
How to sequence SMT and through-hole assembly processes
Typically group components as reflow-compatible, compatible with the relevant through-hole soldering process, requiring masking, or requiring later installation. Use exact part numbers/package documentation, not SMT or THT labels alone. Large electrolytics, transformers, sensors, connectors, and cables may have different thermal limits or obstruct placement, cleaning, and testing. Sequence should account jointly for heat exposure, mechanical fastening, and rework access.
Wave, selective, and manual soldering differ in heat input, tooling, and cycle time. Selective soldering does not automatically protect every neighboring component; confirm nozzles, contact areas, and preheating. Manual soldering requires consistent operations and actual inspections. Process substitutions changing joints, cleaning, or final test conditions require review, not merely a changed quotation label.
One documentation set must drive every process
Gerber, BOM, pick-and-place data, assembly drawings, DNP, and test files need consistent revisions. BOMs specify complete part numbers, quantities, and permitted substitutions. Coordinates define units, origins, rotations, and sides. Assembly drawings identify polarity, later-installed parts, and special fastening. Programs/calibration parameters need separate revision and checksum identities. PCB revision alone cannot prevent mixed software or assembly options on identical boards.
- SMT inputs: pads, stencils, reference designators, orientations, supply packaging, and unpopulated components
- Through-hole inputs: lead forming, insertion heights, fastening, and soldering routes
- Material inputs: moisture sensitivity, thermal limits, cleaning/coating compatibility, and traceability
- Software inputs: program files, configurations, unique identities, and authorized sources
- Test inputs: methods, cases, loads, criteria, records, and failure handling
Initial discussions can start with application, board type, and quantity before formal files. Scheduling and complete quotations require defined documentation scope. After changes, identify affected preparation, programs, and fixtures. An old test program running on a new board, even if it starts, does not establish compliance of added interfaces or changed circuits.
Select detection method based on target defect
| Work | Primary Response | Additional notes required |
|---|---|---|
| AOI or manual visual inspection | Visible assembly status and defined defects | Masked areas, side designation, programs, and re-evaluation |
| X-ray | Structural information for specified hidden connections | Component coverage, viewing angles, criteria, and image retention |
| Electrical Test | Specified Network or Electrical Parameters | Probe access, fixtures, coverage, and limitations |
| Programming Verification | Correct programming targets, revisions, and contents | Identity uniqueness, lock bits, and readback methods |
| Functional Testing | Whether the target action is completed under specified operating conditions | All ports, loads, timing, and environment |
Coverage needs a denominator. For 10 BGAs, inspecting only 2 is not equivalent to inspecting every BGA; testing one of two power rails also needs explicit identification. Passing tests cover executed cases, not untested functions or system-life guarantees. Define retest rules rather than repeating until one pass and deleting earlier failures.
How to compare setup costs versus per-board costs
Example without company pricing: option A has setup cost A, per-board assembly B, and per-board testing C. For N delivered boards, comparison total is A＋N×(B＋C), with materials, bare boards, tax/shipping, and exclusions separate. If option B has lower setup but excludes test programs/fixtures, totals alone cannot establish lower cost. Setup may depend on revisions/products; confirm reorder reuse rather than assuming payment is permanently one-time.
Test duration often affects execution cost. Programming, calibration, and long-duration runs may share fixtures or occupy different stations. Define parallel testing, result records, and failure-diagnosis responsibility. When quantity changes, distinguish batches, accepted delivery, and trial consumption. Input boards multiplied by a rate do not establish final delivered unit cost.
Mixed assembly control board route example
Engineering example: a board has double-sided SMT, QFN, a power transformer, and external harnesses, with final operation on a specified load required. Review double-sided reflow/QFN inspection first, then insert and appropriately solder the transformer, followed by cleaning, depanelization, programming, and connected-load testing. Validate actual sequence against components/tooling, especially later-installed parts blocking imaging, cleaning, or probes.
If quotations include only post-reflow AOI, delivered boards still lack transformer post-solder inspection and final functional testing. Add route milestones and costs before comparing suppliers. Power-area solder rework requires retesting power, related interfaces, and affected functions. Final delivery packages should link board IDs, material configurations, software revisions, test records, and exception handling so reorders reuse controlled routes.
common questions within processing scope
Does turnkey PCB assembly automatically include every test?
No. Material-supply responsibility and test scope are separate contract items. Agree individually on test programs, fixtures, operating conditions, and records.
Can production omit first articles after prototypes pass?
Follow approved plans and current-batch changes. Changes in files, materials, tooling, programs, or production conditions require assessment of reconfirmation scope. Historical prototype passage alone cannot justify skipping current-batch checks.
Is the post-operation re-verification complete
If soldering, cleaning, depanelization, heatsink installation, or wiring follows final testing, assess new effects. Test plans must state actual configurations at testing; early bare-board acceptance is not complete evidence after later assembly. Mechanical fastening may bend boards, cleaning may affect connectors, and later soldering may affect neighbors; assign suitable rechecks separately. Travelers should define abnormal-board removal from normal routes, rework approvers, and return-to-retest points. Retain failure causes and changes rather than only final passes. Link board IDs, configurations, software, and tests for understandable delivery reports. Check whether process outputs remain valid in final states: changed harnesses alter interface support, and changed heatsinks require reconfirmed load thermal conditions. A complete route verifies each change appropriately; checked boxes for every process are insufficient.
Source material and applicable scope
- PCBWay, “PCB assembly Capabilities”; webpage version not identified; checked 2026-10-17; sections: assembly items and Testing Procedures. Supports fields for processing, documentation, and inspection scope; equipment extremes, prices, qualifications, yields, and old acceptance standards are not adopted.
confirm current board assembly route · Refine factory test scope
