ADS127L11 is a 24-bit single-channel ΔΣ ADC. The current datasheet distinguishes wideband filtering up to 400 kSPS from low-latency filtering up to 1.067 MSPS. Their responses, delays, and noise differ; the maxima cannot be combined into one operating state. Define signal bandwidth, input changes, and allowable settling before designing drivers, references, and digital interfaces.
Continuous spectra and step measurements require different tradeoffs
Wideband filtering suits broad passbands and frequency-domain performance; low-latency filtering suits faster response, but actual filter order, oversampling ratio, and output rate still need review. Higher rate does not provide identical noise/distortion over the whole bandwidth. Specify useful passband, stopband interference, and allowable group delay separately.
| Application Input | Mode characteristics to compare | Required Output |
|---|---|---|
| Continuous Vibration or Acoustic | Passband, stopband, dynamic range, and group delay | Frequency response and spectrum analysis configuration |
| Step or Closed-Loop Measurement | Rise time, delay, and rate | Step response and the time of the first valid result |
| External multiplexing switching | Analog setup and digital filter memory | Discard data and wait conditions after switching |
| Low-Power Operation | Speed gears, clock, and noise variations | Power dissipation and available accuracy comparison |
Analog drive and reference are both dynamic loads
ADC inputs and reference require dynamic current during conversion. Select drivers for bandwidth, settling, noise, distortion, and capacitive-load stability, beyond DC output range. Precharge-buffer functions do not permit unconditional connection of arbitrary high-impedance sources.
Input RC provides antialiasing or charge-kickback isolation and affects driver stability. Design filtering for passband and out-of-band interference first, then check sampling-charge transient settling. Larger resistance may ease drive load but create gain error/insufficient settling; larger capacitance may destabilize the preceding amplifier. Reverify dynamic results after driver changes.
Reference noise modulates conversion scale. Place buffers and decoupling close to corresponding pins with short loops. Separate reference routes from digital clocks and keep SPI returns out of reference/analog-input regions. Record actual reference voltage and loading; nominal reference alone cannot convert all data accurately.
Clock and power supply must be bound to register configuration
Internal/external clocks, speed grades, filters, and oversampling jointly set rate. Read back first-board configuration and measure DRDY or equivalent cadence against theory. If rate is correct but spectra are abnormal, check clock edges, supply coupling, and dropped samples before assigning all noise to analog components.
Keep digital interfaces away from sensitive inputs with continuous ground references; assess source-series damping from waveforms. Clock jitter matters more for high-frequency inputs; SNRj≈−20log10(2πfinσt) illustrates the trend. With assumed fin of 100 kHz and RMS jitter of 10 ps, the theoretical jitter limit is approximately 104 dB. This describes one error term, not complete-product SNR.
Make bitstream bandwidth and FFT configurations reproducible
At 400 kSPS and 24 bits per sample, payload is 9.6 Mbit/s. SPI also carries status, CRC, commands, gaps, and controller overhead. Its clock cannot merely equal net bitrate; select it from full frames/timing and verify DMA buffers and continuous acquisition without missing samples.
At assumed 200 kSPS and 65536 points, duration is approximately 0.32768 s and frequency resolution approximately 3.052 Hz. For noncoherent sampling, specify windows and amplitude/equivalent-noise-bandwidth corrections. An FFT peak without rate, point count, and window cannot substantiate dynamic range or distortion.
Split noise sources into three experimental groups
| Experiment | Fixed Conditions | Observation and Output |
|---|---|---|
| Static Input | Valid common mode, controlled short, or stable level | Raw codes, mean, standard deviation, and discrete interference |
| Low Distortion Sine Wave | Amplitude, frequency, source, and filter settings | SNR, THD, spectra, and source limitations |
| Step Switch | Input amplitude, drive, filtering, and triggering | Settling, overshoot, and valid-data timing |
| Digital signal comparison | Same analog source with communication and other loads toggled | Noise correlation and coupling trigger conditions |
Fixed spectral lines with shorted inputs suggest checking reference, supply, clock, and digital coupling. Distortion only at large high-frequency inputs suggests driver settling/source limitations. Errors after switching require analog and digital-filter settling review together. Retain unsmoothed raw codes; postprocessing cannot conceal dropped samples or saturation.
Verify range utilization and front-end saturation separately
Convert sensor output, bias, and gain into ADC differential input and each pin's common-mode voltage. Even below differential full scale, the preceding amplifier may reach input/output limits. Record positive/negative peaks, common mode, and supplies; vary amplitude to identify clipping first occurring in the driver rather than ADC.
Small range utilization uses fewer code bits, but raising gain also amplifies bias, low-frequency drift, and out-of-band interference. Estimate maximum signals/transients first, choose gain and antialiasing, then test noise with real inputs. Smaller static code fluctuation is not the only objective; excessive low-pass filtering can remove application bandwidth.
Retain point count, rate, and digital filtering in static-noise statistics, distinguishing RMS from peak-to-peak noise. Peak-to-peak values depend on observation length, so unmatched record lengths are not directly comparable. Spectral density and integrated noise have different units; retain reference and front-end gain when converting to input-referred noise.
For external multiplexing, test full switching steps: fix the preceding channel's level, switch to the target, and observe combined driver/ADC settling. Reconfirm wait times after filter/rate changes; the first frame or codes are not automatically stable new-channel data.
Deliver at least raw codes, configuration readback, conversion-script revision, and source information together. Make mean removal, windowing, averaging, and filtering order reproducible so tools do not produce apparently conflicting performance results.
Does 24-bit code width equal 24-bit measurement accuracy?
No. Code width describes output format; noise, references, nonlinearity, and calibration affect accuracy. Report task-relevant in-band noise, distortion, and error, beyond bit count. For simultaneous multichannel measurement, compare ADS131M08 channel synchronization and phase calibration; a single-channel ADC with multiplexing is not simultaneous sampling.
Report amplitude and input-referred units together
Noise may be expressed in codes, volts, or input engineering units, each requiring reference voltage, gain, and conversion. Changing front-end gain can increase code noise while reducing input-referred noise; code magnitude alone is insufficient. Show original and converted units together for easier review.
Dynamic reports should distinguish SNR, THD, and SINAD, specifying DC/harmonic exclusions and bandwidth. If source residual distortion approaches the measurement, limit conclusions to the test chain's capability. Separate board noise from instrument limits; extra analysis decimal places do not establish greater accuracy.
Source material and applicable scope
- Texas Instruments, “ADS127L11 400-kSPS, Wide-Bandwidth, 24-Bit, Delta-Sigma ADC”; Rev. C; checked on 2026-10-17; relevant sections: Digital Filter, Analog Inputs, Reference, Serial Interface, Application and Implementation, Layout. Supports single-channel ADC rate modes, inputs/references, and application conditions.
