AMC1311 isolated voltage sensing: dividers, supplies, and error

AMC1311 is a high-input-impedance isolated amplifier for divided-voltage measurement, with nominal gain 1. Treat measured voltage, divider, isolated-side supply, differential output, and ADC as one chain. AMC1311 and AMC1311B have different supply/error conditions; do not consolidate materials by base model alone or treat component isolation parameters as board-level safety conclusions.

Calculating voltage divider ratio and resistor stress completely first

Let high-side series resistance total RH and low-side resistance RL. Ignoring loading, VIN＝VBUS×RL/(RH＋RL). For an assumed 100 V maximum input and 1.8 V nominal target, the ratio is 1.8%. At 1 MΩ total resistance, RL is approximately 18 kΩ and RH 982 kΩ, with approximately 100 µA branch current and 10 mW total dissipation. This illustrates calculation only, not approval of a high-voltage resistor chain.

Check individual high-side resistor working voltages, pulse stress, temperature derating, and post-fault voltage distribution. Low total dissipation does not establish adequate individual voltage rating. When splitting RH across resistors, maintain PCB spacing consistent with actual potential gradients, avoiding adjacent high-/low-potential pads. Provide justified normal/transient headroom in the ratio; do not use input clamps as routine limiters.

Model suffix affects high-side power conditions

The current datasheet recommends high-side VDD1 of 4.5–5.5 V for AMC1311 and 3.0–5.5 V for AMC1311B; low-side VDD2 is 3.0–5.5 V. For a 3.3 V high-side supply, confirm the B version and error conditions; the standard version is not equivalent. Decouple both sides locally, returning capacitors to their respective grounds.

The output is differential; the receiver must accept both differential swing and each output's common-mode level relative to GND2. A differential signal within ADC range can still distort if one pin exceeds common-mode limits. For differential-to-single-ended conversion, include resistor ratios, amplifier input/output ranges, and ADC sampling-drive capability in error/bandwidth budgets.

Budgeting offset, gain, and temperature drift separately

Divider error scales with measured voltage; amplifier input offset is proportionally larger at low voltage. If the actual input node is 1.8 V and input-referred offset is 1 mV, the contribution is approximately 0.056%; at 0.1 V it is 1%. This illustrates ratios, not a guaranteed value for any AMC1311 grade.

Budget resistor initial tolerance, ratio temperature drift, component offset/gain, receiving amplifier, and ADC reference error separately. Worst-case addition and statistical combination answer different questions; without distribution evidence, root-sum-square calculations must not reduce guaranteed error. Typical drift is not automatically maximum drift; post-calibration residuals still need temperature/time coverage.

Filtering after a high-impedance divider must account for settling

The filter capacitor and divider Thevenin resistance form a pole: RTH＝RH parallel RL, fc≈1/(2πRTHC). For assumed RTH of 18 kΩ and C of 10 nF, the pole is approximately 884 Hz. This illustrates magnitude only; select values against application bandwidth, ripple, and settling time, checking input protection and component-drive requirements.

Larger capacitors reduce high-frequency content but slow startup/step settling. Software reading and zero-calibrating immediately after power-up may mistake an unsettled voltage for offset. Record high-side supply, divider-node, and output settling, and define valid-sampling wait conditions.

Using segmented measurement to locate overall reading deviation

If node voltage differs from calculation, check resistors, soldering, leakage, and measurement loading first. If the node is correct but differential output is wrong, check model, supplies, and receiver range. If analog output is correct but digital results are wrong, check ADC conversion, signs, and coefficients. Test connections must preserve isolation; qualified personnel/equipment perform high-voltage verification under an approved plan.

Generate traceable conversion from raw readings

Define ADC-code-to-differential-voltage conversion first, divide by isolator gain, then recover measured voltage using the divider ratio, identifying units, signs, and references at every step. Add gain/offset for any differential-to-single-ended stage. Software tests should cover zero, intermediate, near-full-scale, and invalid codes to avoid double scaling or converting invalid outputs into normal voltages.

For two-point calibration, retain reference inputs, uncalibrated outputs, environment, supplies, and fit coefficients; check residuals at independent points. Correct calibration points with large intermediate errors require checking nonlinearity, receiver range, or measurement methods. Do not automatically update coefficients from unknown inputs at startup, potentially absorbing real faults as zero offsets.

Divider design must account for instrument input impedance. Ordinary probes or multimeters can load high-impedance nodes and shift readings from unloaded designs. Calculate equivalent parallel impedance and verify under low-risk conditions. Changed readings after probing do not directly establish isolator input leakage.

Specify whether error acceptance is percent of reading, percent of full scale, or input-referred voltage. An assumed fixed chain error of 0.5 V is 0.5% at 100 V but 5% at 10 V; an undefined percentage misleads low-range assessment. Calculate divider and isolation-chain errors separately before combining, retaining range and temperature conditions.

Final review should distinguish measurement range, normal overrange, missing supply, and fault states. Reading validity depends on status and analog conditions together; not every ADC code should unconditionally control the application.

Can one room-temperature two-point calibration cover every error?

Two-point calibration corrects zero and scale errors under those conditions, not drift, nonlinearity, unsettled startup, or overrange saturation. Bind coefficients to hardware, model, and software revisions, retaining raw uncalibrated data. For shunt-current measurement, compare AMC1300 low-voltage differential inputs and Kelvin connections; the two input structures cannot share parameters interchangeably.

Give separate usable conclusions for low range and overrange

For tasks reading both high and low voltages, calculate offset contribution at the low end and divider/saturation limits at the high end. If one divider cannot meet both accuracy targets, compare switched ranges, error grades, or receiver approaches instead of merely reducing displayed decimal places.

Measure output recovery time after overrange so software knows when to accept readings again. Define missing-supply, shutdown, and out-of-range invalid states separately, preventing faults whose waveforms fall within normal ADC codes from appearing valid. Retain their input conditions and actual responses for later control algorithms.